1. Hierarchical modeling for VLSI circuit testing
المؤلف: Bhattacharya, Debashis
المکتبة: کتابخانه مرکزی و مرکز اطلاع رسانی دانشگاه فردوسی مشهد (خراسان رضوی)
موضوع: Very large scale integration - Testing ، Integrated circuits,Very large scale integration - Computer simulation ، Integrated circuits
رده :
TK
7874
.
B484
1990
2. Hierarchical modeling for VLSI circuit testing
المؤلف: Bhattacharya, Debashis
المکتبة: كتابخانه مركزی دانشگاه صنعتی شریف (طهران)
موضوع: ، Integrated circuits-- Very large scale integration-- Testing,، Integrated circuits-- Very large scale integration-- Computer simulation
رده :
TK
7874
.
B484
1990
3. Unified methods for VLSI simulation and test generation
المؤلف: by Kwang-Ting Cheng and Vishwani D. Agrawal
المکتبة: كتابخانه مركزي و مركز اطلاع رساني دانشگاه شاهد (طهران)
موضوع: Integrated circuits- Very large scale integration- Computer-aided design,Integrated circuits- Very large scale integration- Testing,Integrated circuits- Very large scale integration- Computer simulation
رده :
TK
،
7874
،.
C525
،
1989
